Hardware Functional Safety Lead

Functional Safety Hardware Lead Engineer (#EHE)

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Take advantage of a rare opportunity to lead the development of next-generation automotive electronic hardware platforms supporting Stellantis' Software Defined Vehicle (SDV) strategy. We are seeking an experienced Hardware Functional Safety Lead Engineer to drive the development of safety-compliant ECU hardware architectures across vehicle platforms and domains.

As a Functional Safety Hardware Lead at PDT/EHE, you will lead hardware functional safety activities from concept through production, ensuring compliance with ISO 26262 and Stellantis engineering processes. You will work closely with system architects, hardware designers, semiconductor suppliers, software teams, cybersecurity engineers, validation teams, and safety managers to develop robust, safety-compliant electronic control units (ECUs) and compute platforms.

The role requires deep expertise in automotive hardware design, safety analysis, semiconductor technologies, hardware architecture, reliability engineering, and safety case development. The successful candidate will be a recognized technical leader capable of influencing global vehicle programs and mentoring safety engineers across regions.

Responsibilities:

• Lead Hardware Functional Safety activities in accordance with ISO 26262 Part 5 throughout the product lifecycle.
• Define and review Hardware Safety Concepts (HSC) and derive hardware technical safety requirements.
• Drive development of safety-compliant ECU hardware architectures for ASIL A, B, C, and D systems.
• Support Hazard Analysis and Risk Assessment (HARA) and allocation of safety goals to hardware elements.
• Lead and Review FMEDA , DFA, FTA, Hardware architectural evaluations safety analysis
• Ensure traceability from safety goals through hardware requirements and verification activities.
• Lead hardware safety architecture development for ECUs, domain controllers, zonal controllers, gateways, body controllers, and high-performance compute platforms.
• Review schematic designs, power architectures, clock architectures, reset strategies, watchdog implementations, and safety monitoring mechanisms.
• Evaluate fault-tolerant hardware architectures
• Support semiconductor selection and safety evaluation of MCUs, SoCs, PMICs, memories, and communication devices.
• Ensure timely closure of safety issues, risks, assumptions, and deviations.
• Review hardware verification reports, test coverage, and safety evidence.
• Mentor and coach Hardware Functional Safety Engineers.
• Establish best practices, methods, templates, and lessons learned.
• Drive continuous improvement in hardware safety processes and engineering capability development.